G. G. |
Bldg , Shanghai Salon,
and Material Development ENGINEER
Specializing in Semiconductor and Substrate
Experienced process engineer with more than years record of success in
propelling breakthrough process improvements and bottomline gains for
semiconductor and substrate assembly.
Experience in interfacing
oversees customer with regards to substrate assembly process. Can work independently on customer sites in
resolving possible substrate and assembly related problem .
Broad Experience in process
engineering, costreduction strategies and energysaving solutions. Known for innovative problem solving, complex
troubleshooting and skillful relationshipbuilding with cross functional
team ,suppliers and customer.
Key Skills & Knowledge
Design of Experiment DOE
Problem Solving Methodology PSM
FOL to EOL Assembly Process
Failure Analysis and Reliability
FMEA/APQP Process Design
ISO & SPC Systems / Tools
D Global Generation
Project Management and Tracking
RF MICRO DEVICES RFMD Beijing, China
Senior Material Development Engineer
March up to present
Responsible for identifying
and monitoring key properties of the substrates used to make RF products.
Interact with substrate suppliers
to identify trends and troubleshoot shortterm quality challenges.
Close coordination with RF
Development Engineer, Process Engineers, Quality Manager, R&D staff
and production staff to analyze cause and effect in quality issues related
Responsible for qualification
of new substrate suppliers, package selection and maintain quality of
existing packages for all product groups and per customer requirements:
selective surface finishes NiAu,NiPdAu, OSP, Pbfree, RoHS compliant,
JEDEC, and IPC.
Develop new process qualifications
performing integrity analysis and characterizations. Work with QA and
suppliers to resolve quality issues.
Manage suppliers over manufacturing/assembly
operations, acting as a liaison with design, suppliers and vendors to
identify and implement opportunities for improving manufacturing capability,
advancing the technology while reducing the cost.
Material selection, board
characterization, package Qualifications at Feasibility, Prototype and
Pilot release, coordinating manufacturing, Electrical Test, and all
post reliability failure analysis and investigative techniques CSAM,
KINSUS INTERCONNECT TECHNOLOGY Laminate
Substrate Mfg.g, Taoyuan County, Taiwan,ROC
Chief Engineer / Manufacturing
Responsible for the over
all yield improvement of substrate assembly process.
Leads projects and teams
investigation , problem analysis and implementation of solutions.
Develop action plans to analyze
performance variance and implement or recommend corrective action.
Performs analysis on customer
complain product and formulate action plan to improve output and decrease
Participate in the development
testing and prototype builds for new products and product enhancements
of Flip Chip substrate material from BT to ABF materials to meet customer
Support the qualification
of substrate thinner layer of gold surface from . to . um for cost
Review and support the qualification
of new substrate through hole plugging material for CSP product type
from AUS material to PHP IR plugging material.
Support the improvement and
qualification of copper wire material in customer assembly on substrate
process through effective cleaning of substrate.
Interface overseas customer
and provide on site support to resolve assembly problem on processing
of substrate on below customer;
Muar, Malaysia PBGA Process
Shanghai, China FBGA Process
Serangoon, Singapore PBGA Process
Suzhou, China COB Process
Taichung, Taiwan ROC Flip Chip
FAIRCHILD SEMICONDUCTOR , Cebu, Philippines
Senior Process Engineer, End of
Line Process Mold to DTFS ,
July to February
EOL Process Mold, Deburr and Trim / Form on
Power and Automotive Packages such as TO, TO, TO Full
Pack and SOT.
Develops and improve program
to eliminate incomplete fill and package crack defects on T package
through tool design modification
Evaluate and improve effective
mold tool cleaning process to ensure quality and increase productivity
Buy –off ASM Mold PGS System
in Yshun Singapore ASM Site to conceptualized modification on mold
tool to eliminate the package crack on TO packages.
Responsible for the improvement
of mold sticking defect through implementation of additional ejector
pins in mold tool design in Mold Process.
Responsible for Fairchild
Semiconductor Cebu passed qualification in TS on Automotive Packages
Technical Paper Participants
in Fairchild Semiconductor annual Technical Sympossium held in Penang
AMKOR TECHNOLOGY PHILIPPINES , Muntinlupa,
Process Engineer II, End
of Line Process Mold ,
April to July
Responsible of Mold
Process on SOIC Packages.
Ensure adherence to quality
systems standards and procedures, such as APQP, FMEA, etc.
Responsible for the qualification
and improvement of NiPdAu leadframe on SOIC EOL process.
Responsible for the qualification
and implementation of Green Molding Compound in SOIC Packages.
Implemented the partial molding
compound withdrawal in SOIC and PDIP Packages to improve cost scrappage
Reduce usage and cost improvement
of copper leadframe in mold tool cleaning through implementation of
paper dummy leadframe.
Modified deculler blade of
Mold deculling process to decrease runner remained to improve process
Participants in Amkor Technical Sympossium.
Awardee in Amkor Technical Sympossium.
AMKOR TECHNOLOGY PHILIPPINES , Muntinlupa,
Process Engineer I/ Front
Of Line Process Wirebond ,
August to April
Responsible of Wirebond
Process on TSSOP Packages.
Attends to all customer issues,
provides data analysis and their corrective and preventive measures.
Troubleshoots problems in
manufacturing lines and responds to customer complaints on technical
opportunities and solved challenging technical, processflow and resourcelimitation
Assists customer audit on
Evaluate and Implemented
standardization of Target Value Capillary in Wirebond SOIC process
Quality Awardees of Quarter
AMERICA ONLINE AOL , Clark Airbase,
Technical Support Engineer,
March to August
Inter department coordination
on issue that may affect the customer .
Real time resolving of problem
encountered by customer using AOL Software.
Acknowledge and response
to all customer queries/questions within hours.
Customer guide / line tour
coordination and company presentation.
AMERTRON INCORPORATED Hewlett Packard
Subcon Plant , Clark Airbase, Pampanga, Philippines
Process Engineer / Front
Of Line Process Die Attach/ Wirebond to Mold ,
June to March
Responsible of Front of Line
FOL to Mold Process on Optocoupler Package
Responsible for the Start
up qualification of Amertron Clark to passed mass verification build
MVB on Hewlett Packard Singapore HP
Responsible for Passing the
ISO Qualification Audit in Amertron Clark Assembly.
Impose corrective action
on products or lots not conforming to the specification and corporate
Define process parameter
for Die Attach and Wirebond to attain standard setup and control process
Provide Engineering report
on process performance, current activities and project status through
Conduct periodic orientation
of production personnel on current operating procedures, new system,
and documented specification to keep them informed on the process.
Conduct engineering evaluations
regarding process and material qualification to pave way process improvements
and expedite process cycle time.
Had trained in Hewlett Packard
HP Singapore for Optocoupler Assembly Process.
POLYTECHNIC UNIVERSITY OF THE PHILIPPINES
, Manila Philippines
Bachelor of Science
BSECE in Electronics and Communication Engineering,
SYSTEMS TECHNOLOGY INSTITUTE ,
Basic Computer Programmer,
Microsoft Office Word, Excel,
Process Analysis Software
Jump, Statistica and MiniTab
Available for Nationwide
Relocation & International Travel