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<pre>Array ( [var] => cut_url ) </pre> Resume for Pratyaksha N. for Engineer / Engineering Services in Stockholm, Sweden. Search More Resumes for Engineer on Resumark.com #9NG4B7EIJ
 

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Resume for Pratyaksha N. for Engineer / Engineering Services in Stockholm, Sweden




Occupation: Engineer Industry: Engineering Services
Country: Sweden City: Stockholm
State: Stockholms Lan ZIP: 1000



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PRATYAKSHA N. RAVINDRA
Address: Block , ,
Date of Birth :
Serangoon North Avenue ,
Gender
: Female
Email:
Phone No
:
CAREER OBJECTIVE
Eagerly looking for a career among the areas of Digital IC Design and IC Verification, Embedded
system design to apply learnt technical skills innovatively to contribute to the real world
technological needs and work in a multicultural environment.
PROFESSIONAL DETAILS
Over years of experience in Digital IC Design, IC Verification on UNIX based Design
Environment and Embedded System Software Design on Windows.
Experience in the whole IC Design process – Design Specification, RTL Design and
Verification, hardware simulations
Experience in Cmodeling of various verification scenarios for digital ASIC Verification
Expertise in ConstrainedRandom Verification methologies eRM /OVM and development of
Verification IPs in Specman
Good experience in debugging and resolving issues across design flow
Knowledge of Shell and Tcl Scripting
Contributing to the team on ideas to automate verification IP development process
Experience in the Design, Implementation and testing of Software modules in Clanguage
EDUCATION
M.Sc. in IC Design
Technical University of Munich, Germany and Nanyang Technological University Singapore.
[]
Over all CPGA: ./.
Bachelors in Electronics and Telecommunication
Visvesvaraiah Technological University, Bangalore, India[]
Distinction Student – Top College rankers
TECHNICAL SKILLS
Technical expertise in RTL Design, Synthesis, ConstrainedRandom Verification,
Embedded System Design and Development, Shell Scripting
CAD Tools
: Mentor Graphics Design Architecture and IC station, Cadence
tools Specman integrated with NCSIM, Eanalyzer, Spyglass,
Certress Certitude, Synopsys Design Compiler.
Programming Languages
: C, Perl, C++, UML, Shell Scripting, Tcl.
Hardware Languages
: Property Specification Language PSL, VHDL, Specman
Revision Control Tools
: CM Synergy, Clearcase.
Software Tools
: AUTOSAR suite from TNI AAT, Enterprise Architect
KEY PROFESSIONAL EXPERIENCE
IC Design Engineer, STMicroelectronics Asia Pacific Pte Ltd,
Singapore [Jan Present]
RTL Design and Development of Cryptography macrocells in Smartcard products
o Designed and Developed AES Standard for bit platform in VHDL for brand protection
application
o Verified EDES Encryption Standard in Clanguage for Smartcard product.
Development of assertion checkers and coverage analysis
o Created assertions in Property Specification Language PSL for EDES and AES macrocell
to run along with the design under test
o Developed Coverage cells for the Design and analyzed the holes in coverage and fixing
them.
Creation of constrainedrandom verification environment in Specman for Single Wire
Protocol SWP
o Developed the verification environment for SWP Protocol model using Specman compliant
to eRM standards.
o Developed sequence library to perform constrained on the fly generation of seeds for several
test scenarios.
o Developed checkers and monitors to track changes on the DUT and compare with the model
in the scoreboard in realtime.
o Built the environment as a selfchecking model and created test cases to verify the DUT
with best possible coverage.
Creation of constrainedrandom complete verification environment in Specman for AES
o Successfully created an interface between AES Specman environment and Clanguage data
generator
o Created AES Verification Environment on bit platform for brand protection application
o Developed selfchecking model for verification of critical functionality and created test
scenarios for to verify with % functionality coverage
Embedded Software Engineer, Delphi Automotive Systems Pvt Ltd,
Bangalore, India [July –July ]
Software Design and Development of AUTOSAR software building blocks in C language and
integration with other AUTOSAR modules forming ECU software
o Handled the responsibility of SPICE level compliant Design, Implementation and Testing
of ECU State Manager and Compiler Abstraction AUTOSAR modules release .
o Completed SPICE level compliant Design, Implementation and Testing of Watchdog
Manager AUTOSAR modules release .
Automation of ‘make files’ generation and Project Framework Creation
o Created the tool to autogenerate Project framework setup on workstation to do all tasks of a
Software Development Life cycle
o Developed the automation script to generate ‘make files’ by parsing xml files
o Setup Project framework for the team and tested it on several modules
TRAINING AND WORKSHOPS
Synopsys DC compiler Training
Synopsys PrimeTime Training
Using UVM Methodology for ASIC Verification using System Verilog
HONORS, AWARDS AND ACHIEVEMENTS
Awarded DAAD Scholarship for semesters during MS in IC Design Course for being an excellent
performer
Obtained the Quality Performance Award at Delphi for being an excellent performer at work at
Delphi
One of the top performers in Electronics Department in years of engineering
NTSE National Talent Search Examination awardees at the national level in the year
Topped the school in the All India Secondary Examination with . % and received Ms Kirthi
Sangoram Memorial Award
Prathibha Puraskar Award from The Accountant General’s Office Employees Cooperative Bank
Ltd. for being an outstanding performer in AISSE All India Senior Secondary Examination
REFERENCES

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